As a related-art drive circuit for a power semiconductor element (IGBT), there has been disclosed a technique wherein, during a period for which a sampling circuit permits a detection process for a gate voltage, the gate voltage is detected, and when the gate voltage exceeds a reference value, the occurrence of any abnormality in the IGBT is concluded (refer to, for example, Patent Document 1).
Patent Document 1: JP-A-2004-064930 (Lines 31-37 on page 7, FIG. 1)